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SS811, SS812
Reset Circuits with Manual Reset Input
FEATURES
Ultra-low supply current of 1A (typ.) Guaranteed reset valid to Vcc=0.9V Available in two output yypes: Push-pull active -low (SS811) Push-pull active -high (SS812) Power-on reset pulse width minimum 140ms Internally fixed threshold 2.3V, 2.6V, 2. 9V, 3.1V, 4.0V, 4.4V, and 4.6V Tight voltage threshold tolerance: 1.5% Low profile package: SOT-23-5 These devices perform as valid singles in applications with Vcc ranging from 6.0V down to 0.9V. The reset signal lasts for a minimum period of 140ms whenever the VCC supply voltage falls below a preset threshold. Both the SS811 and SS812 were designed with a reset comparator to help identify invalid signals lasting less than 140ms. The only difference between the SS811 and the SS812 is that one has an active -low RESET output and the other has an active -high RESET output .
DESCRIPTION
The SS811 and SS812 are low-power microprocessor (P ) supervisory circuits used to monitor power supplies in P and digital systems. They improve circuit reliability and reduce cost by eliminating external components. The SS811 and SS812 also offer a manual reset input.
APPLICATIONS
l l l l
Notebook Computers Digital Still Cameras PDAs Critical Microprocessor Monitoring
A low supply current (1A) makes the SS811 and SS812 ideal for portable equipment. The devices are available in a SOT-23-5 package.
TYPICAL APPLICATION CIRCUIT
VCC VCC SS811 (SS812) RESET MR (RESET) GND VCC P RESET INPUT GND
Pushbutton Switch
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SS811, SS812
ORDERING INFORMATION
SS811-XXCXXX SS812-XXCXXX Packing type TR: T ape and reel Package type V: SOT- 23- 5 Reset Threshold Voltage 23: 2.3V 26: 2.6V 29: 2.9V 31: 3.1V 40: 4.0V 44: 4.4V 46: 4.6V (Additional voltage versions with a unit of 0.1V within the voltage range from 1.5V to 5.5V for this product line may be available on demand with prior consultation with SSC.) Example: SS811 -31C VTR a 3.1V version in SOT- 23- 5 package, shipped in tape and reel. SOT- 23- 5 TOP VIEW 1: G ND 2: NC 3: RESET (RESET) 4: MR 5: VCC
PIN CONFIGURATION
5
4
1
2
3
SOT -23-5 Marking
Part No. SS811-23CV SS811-26CV SS811-29CV SS811-31CV SS811-40CV SS811-44CV SS811-46CV Marking BQ23 BQ26 BQ29 BQ31 BQ40 BQ44 BQ46 Part No. SS812-23CV SS812-26CV SS812-29CV SS812-31CV SS812-40CV SS812-44CV SS812-46CV Marking BR23 BR26 BR29 BR31 BR40 BR44 BR46
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ABSOLUTE MAXIMUM RATINGS
VCC RESET, RESET Input Current (V CC, MR ) Output Current (RESET or RESET ) Continuous Power Dissipation (TA = +70C) Operating Junction Temperature Range Storage Temperature Range Lead Temperature (Soldering) 10 sec -0.3V ~6.5V -0.3V ~ (VCC+0.3V) 20mA 20mA 320mW -40C ~ 85C - 65C ~ 150C 260C
Note1: Any stress beyond the Absolute Maximum Ratings above may cause permanent damage to the device.
TEST CIRCUIT
1 2 3
GND VCC NC MR RESET SS811
5 4 Iin
Vin
Pushbutton Switch
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ELECTRICAL CHARACTERISTICS
(Typical values are at TA=25 C, unless otherwise specified) PARAMETER Operating Voltage Range Supply Current TEST CONDITIONS VCC = VTH +0.1V SS811-23 SS811-26 SS811-29 Reset Threshold VTH SS811-31 SS811-40 SS811-44 SS811-46 VCC to Reset Delay Reset Active Timeout Period TRD TRP TMD VIH VIL 10 VOH VOL VOH VOL VCC=VTH+0.1V, ISOURCE =1mA VCC=VTH - 0.1V, ISINK =1mA VCC=VTH+0.1V, ISOURCE =1mA VCC=VTH - 0.1V, ISINK =1mA 0.8V CC 0.2Vcc 0.8V CC 0.2Vcc 20 TA=+25C TA= -40C to +85C TA=+25C TA= -40C to +85C TA=+25C TA= -40C to +85C TA=+25C TA= -40C to +85C TA=+25C TA= -40C to +85C TA=+25C TA= -40C to +85C TA=+25C TA=-40C to +85C TA=+25C 2.265 2.254 2.561 2.548 2.857 2.842 3.054 3.038 3.940 3.920 4.334 4.312 4.531 4.508 20 140 100 0.5 0.7V CC 0.25V CC 30 230 560 1030 4.6 4.4 4.0 3.1 2.9 2.6 MIN. 0.9 1 2.3 TYP. MAX. 6 3 2.335 2.346 2.639 2.652 2.944 2.958 3.147 3.162 4.060 4.080 4.466 4.488 4.669 4.692 S mS S V K V V V UNIT V A
SYMBOL
VCC ICC
VCC=VTH to (VTH -0.1V), VTH=3.1V VCC = VTH(MAX) TA= -40C to +85C Vcc=6V
MR to Reset Propagation
Delay
MR Input Threshold MR Pull-Up Resistance
RESET Output Voltage
RESET Output Voltage
Note2: RESET output is for the SS811; RESET output is for the SS812. Note3: Specifications for operating temperature ranges from -40C to 85C, are guaranteed by Statistical Quality Controls (SQC), with no production testing.
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TYPICAL PERFORMANCE CHARACTERISTICS
1.5 1.4
120
Power -Down Reset Delay (s )
110 100 90 80 70 60 50 40 30 20 10 0 -60 -40 -20 0 20 40
VTH=2.3V
Supply Current (A)
1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 0.5 -40 -20 0 20
VTH=2.3V VO D=VTH-VCC
VTH=3.1V VTH=4.6V
VOD=50mV VOD=100mV VOD=200mV
40
60
80
100
60
80
100
Temperature ( C) Fig 1 Supply Current vs. Temperature
240
Temperature ( C) Fig 2 Power-Down Reset Delay vs. Temperature
Power -Down Reset Delay (s )
Power -Down Reset Delay (s )
220 200 180 160 140 120 100 80 60 40 20 0
-60 -40 -20
VTH=3.1V VO D=VTH-VCC
400
VOD=50mV
VTH=4.6V VOD=VTH-VCC
300
VOD=50mV
200
VOD=100mV
100
VOD=100mV VOD=200mV
0 20 40 60 80
100
VOD=200mV
0
-60 -40 -20 0
20
40
60
80
100
Temperature ( C) Fig 3 Power-Down Reset Delay vs. Temperature
600
Temperature ( C) Fig 4 Power-Down Reset Delay vs. Temperature
Normalized Reset Threshold (V)
1.010 1.005 1.000 0.995 0.990 0.985 -40 -20 0
VTH=4.6V
Power -Up Reset Timeout (ms)
1.015
500 400
VTH=3.1V
300 200
VTH=3.1V
VTH=4.6V
VTH=2.3V
VTH=2.3V
100 0 -60
20
40
60
80
100
-40
-20
0
20
40
60
80
100
Temperature ( C) Fig 5 Normalized Reset Threshold vs. Temperature
Temperature ( C) Fig 6 Power-Up Reset Timeout vs. Temperature
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BLOCK DIAGRAM
VCC
RESET (RESET)
R1
Bandgap
+
Reset Generator
R2
R PULL_UP 20K
GND
MR
PIN DESCRIPTIONS
GND Pin RESET Pin (SS811) RESET Pin (SS812) : : : : Ground. Active low output pin. RESET Output remains low while Vcc is below reset threshold. Active high output pin. RESET output remains high while Vcc is below reset threshold. Logic low manual reset input. This active -low input has an internal 20k pull-up resistor. It can be driven by a TTL or CMOS, or shorted to ground with a switch. Leave open when unused. Vcc Pin : Supply voltage.
MR Pin
DETAILED DESCRIPTIONS OF TECHNICAL TERMS
goes high. RESET OUTPUT The microprocessor will be activated at a valid reset state. These P supervisory circuits assert reset to prevent code execution errors during power-up, power-down, or brownout conditions. If a brownout condition occurs (VCC drops below the reset threshold), RESET goes low. Any time VCC goes below the reset threshold, the internal timer resets to zero, and RESET goes low. The internal timer is activated after VCC returns above the reset threshold, and RESET remains low for the reset timeout period. The manual reset input (MR ) can also initiate a reset. The SS812 has an active-high RESET output that is the inverse of the SS811's RESET output.
RESET is guaranteed to be a logic low for
VTH>VCC>0.9V. Once VCC exceeds the reset threshold, an internal timer keeps RESET low for the reset timeout period; after this interval, RESET
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MANUAL RESET INPUT Many microprocessor-based products require manual reset capability, allowing operators, test technicians, or external logic circuitry to initiate a reset. Logic low on MR asserts reset. Reset will remain asserted for the Reset Active Timeout Period (t RP) after MR returns high. This input has an internal 20KO pull-up resistor, so it can be floating if it is not used. MR can be driven with TTL or CMOS-logic levels, or with open-drain/collector outputs. Another alternative is to connect a normal switch from MR to GND to create a manual reset function. Connecting a 0.1F capacitor from MR to ground can provide noise immunity to BENEFITS OF HIGHLY ACCURATE RESET THRESHOLD The SS811/812 with specified voltage as 5V10% or 3V 10% are ideal for systems using a 5V5% or 3V5% power supply. The reset is guaranteed to assert after the power supply falls out of regulation, but before power drops below the minimum specified operating voltage range of the system ICs. The pre-trimmed thresholds reduce the range over which an undesirable reset may occur. prevent noise caused by long cables of MR or noisy environment.
APPLICATION INFORMATION
0V, adding a pull-down resistor to RESET causes NEGATIVE-GOING VCC TRANSIENTS In addition to issuing a reset to the microprocessor during power-up, power-down, and brownout INTERFACING TO MICROPROCESSORS WITH BIDIRECTIONAL RESET PINS Microprocessors with bidirectional res et pins may ENSURING A VALID RESET OUTPUT DOWN TO VCC=0 When VCC falls below 0.9V, the SS811 RESET output no longer sinks current; it becomes an open circuit. In this case, high-impedance CMOS logic inputs connected to RESET can drift to undetermined voltages. Therefore, the SS811/2 is perfect for most CMOS applications with VCC down to 0.9V. However in applications where RESET must be valid down to have contention with the SS811/812 reset outputs. If the SS811 RESET output is asserted high and the microprocessor wants to pull it low, indeterminate logic levels may occur. To correct such cases, connect a resistor between the SS811 RESET (or SS812 RESET) output and the microprocessor reset I/O. Buffer the reset output to other system components. conditions, the SS811 series are relatively resistant to short-duration negative-going VCC transient. any leakage currents to flow to ground, holding
RESET low.
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PHYSICAL DIMENSIONS
SOT-23-5 (unit: mm)
D C L HE
SYMBOL A A1 A2 b
MIN 1.00 -- 0.70 0.35 0.10 2.70 1.40
MAX 1.30 0.10 0.90 0.50 0.25 3.10 1.80
e
1
C D
A2
A
E
A1 b
e H L 1
1.90 (TYP) 2.60 0.37 1 3.00 -- 9
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties.
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